Infinity AI Accelerates Software Readiness for Next-Generation AI Chips

Infinity (Infinity Artificial Intelligence Institute), an early-stage AI infrastructure research company building the software layer that makes any AI chip inference-ready, announced a new case study that showcases tools for its autonomous research and tool-building agent, Ignition, which generates, tests, and optimises the low-level compute kernels, compilers, profilers, debuggers and SDKs that determine how efficiently a chip runs AI models. Developed for a design partnership with d-Matrix for its SRAM-based inference accelerator Corsair, Infinity’s new AI product drastically reduces the time chip companies need before chips are ready for mass market adoption. Ignition is a concrete example of ongoing recursive self-improvement (RSI), as an AI system that builds and autonomously researches the training and inference layers for the next generation of AI systems.

New AI chips are frequently held back not by their hardware capabilities, but by the absence of a mature software stack, precisely what NVIDIA has spent the past two decades building around CUDA. That gap is what typically keeps promising accelerators out of production, and inference now accounts for a growing majority of AI compute spending industry-wide. Infinity’s new tools autonomously iterate on hardware representation and kernel design without requiring a large team of specialised kernel engineers and years of work for each new chip.

“Recursive self-improvement just delivered a scientific breakthrough that will upend the competitive landscape for chips. In a matter of weeks, we built a large part of an alternative to CUDA, which NVIDIA took 20 years to perfect. The tooling we developed for Infinity's Ignition in the process will speed up turnaround times for future design partnerships,” said Jeremy Nixon, founder and CEO of Infinity.

How the Result Was Achieved.

The d-Matrix Corsair chip is a memory-centric accelerator that keeps compute tightly integrated with on-chip SRAM, avoiding the memory-bandwidth bottlenecks that constrain GPU-based inference. Getting a model like Qwen3 to run efficiently on this architecture required mapping weights, activations and cache across a hierarchy of chiplets, gangs, slices, cores and SRAM banks — a memory-packing problem distinct from GPU optimisation.

Infinity's engineering approach combined four techniques to distribute the workload:

• Pipelining: across the card's two packages, splitting model layers to minimise cross-package data transfer.
• Tensor parallelism: sharding dense compute (Q/K/V, output projection, and MLP layers) across 16 hardware gangs.
• Head-parallel attention: assigning each of Qwen3's attention heads to its own gang with no cross-gang communication required.
• Batch parallelism: isolating each sequence's KV cache and state to dedicated slices.

Given that Corsair's SRAM allows weights to stay resident across both prefill and decode phases, Infinity and d-Matrix built explicit lifetime tracking to keep expensive parameters in place while aggressively recycling transient activation memory, expanding usable capacity without repeatedly moving weights.

The optimisation loop was supported by three purpose-built tools:

• Hardware probing and profiling, producing an empirical performance model of real instruction costs and memory behaviour on Corsair.
• MemoryScope, Infinity's compiler, which searches memory placements and parallelism configurations for capacity, lifecycle and locality, paired with a Graph and Memory Sanitiser that statically verifies memory correctness before code runs on hardware.
• Agentic debugging, which drives breakpoints and memory inspection across the model's load-prefill-decode phases to localise numerical errors.

"As inference scales globally, customers need heterogeneous infrastructure where GPUs and purpose-built accelerators work seamlessly together. Getting there requires the ability to enable models faster on rack-scale hardware,” said Sid Sheth, founder and CEO of d-Matrix. “Working with Infinity, we were able to have models running on production-ready Corsair hardware in days, which means customers can deploy truly heterogeneous compute faster. That's a breakthrough for the entire ecosystem."