AI-Powered Analog Simulation to Transform Semiconductor Verification and Accelerate Chip Design

06 August 2026 | Interaction

Following its latest funding round, Mach42 discusses its commercial strategy, AI-driven analog circuit simulation technology, partnerships with EDA leaders, and how agentic AI could reshape semiconductor verification, power management ICs, and next-generation chip development.

Semicon Leaders Asia Interviews Paul Neil, Chief Operating Officer, Mach42 on AI-Powered Analog Simulation, Faster Verification and the Future of Semiconductor Design

 

Q. Mach42’s latest funding will support the commercialisation of AI-driven analog circuit simulation technology. How will this investment accelerate your go-to-market strategy, and which semiconductor market segments represent your highest commercial priorities?

This funding will enable us to deliver our first product - a surrogate model generator supporting automatic creation of Verilog-A models - to market. Our go-to-market strategy is to target the power management space, and our customers are drawn from the top-tier IDMs and fabless semiconductor businesses worldwide. The funding will also enable us to expand our commercial footprint in our target geographies (US and APAC).

Q. Analog circuit verification remains one of the industry's biggest bottlenecks despite advances in digital design automation. How do you see AI transforming analog design workflows, and what measurable benefits can semiconductor companies expect in terms of development time, cost and productivity?

We expect agentic AI to arrive in the analog space between 18-24 months after deployment in digital design workflows. The productivity dividend will be immediate - many agents deployed to carry out topological evaluation, design and verification. However, analog is a much more challenging market, where designer experience often outperforms the best optimisation tools. Agents don’t carry that experience with them, so they have to substitute exhaustive simulation data for experience. This drives a significant step-change in license consumption, but does nothing in terms of reducing the wall clock time for an individual topological evaluation. This is where advanced verification engines of the type that we’re building at Mach42 have the opportunity to compound the agentic productivity dividend with an orders-of-magnitude reduction in corresponding simulation time. This simultaneously offers both time-to-market benefit and the opportunity to create higher quality analog designs.

Q. Your platform is designed to complement existing SPICE simulators rather than replace them. How important is collaboration with established EDA vendors and semiconductor companies in driving industry adoption of AI-powered simulation technologies?

While Mach42 is a fast-moving disruptor, we feel that re-engineering the whole chip development stack is counterproductive. Hence, our partnerships with existing vendors, in particular with Cadence through their Connections program, gives us the opportunity to seamlessly deploy our technology in a familiar environment, lowering the barriers to adoption

Q. Power management devices are your initial focus, but the broader analog semiconductor market spans multiple high-growth applications. Which industries or device categories do you believe offer the greatest opportunities for expanding Mach42’s technology?

We’re building a foundational model - a state-space model - which learns the underlying physics of the circuits that it’s trying to emulate. We’re focused on the circuit structures and behaviours in the power management market in the first instance. Our technology is more broadly applicable - in data conversion and RF, for example - as well as transferable to adjacent implementations such as photonics.

Q. As AI becomes increasingly integrated into semiconductor design, how do you envision engineering teams balancing traditional simulation expertise with emerging agentic AI-driven design methodologies?

I think that agentic AI will transform the analog space. We’ve discussed the immediate productivity benefits elsewhere, but I think that a full front-to-back (text to chip) flow capable of matching elite design teams is a long, long way off. The smart money is on delivering maximum productivity benefit, in terms of time to market or product quality. This means that rather than wholesale flow replacement, point solutions with agentic orchestration and accelerated simulation capability will augment, rather than replace, the engineering team capability.

Q. Looking ahead, what are Mach42’s long-term strategic objectives, and how do you see AI-enabled analog simulation reshaping semiconductor design and verification as chip complexity continues to increase?

We’re building a highly differentiated business based on our ability to generate high-quality surrogate models. Our capability can be deployed at different layers in the stack and into adjacent markets. We think that our foundational technology can become a critical component in future verification flows.